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1

[IEEE 2005 IEEE International Symposium on Circuits and Systems - Kobe, Japan (23-26 May 2005)] 2005 IEEE International Symposium on Circuits and Systems - Optimal Two-Dimension Common Centroid Layout Generation for MOS Transistors Unit-Circuit

Di Long,, Xianlong Hong,, Sheqin Dong,

Année:

2005

Langue:

english

Fichier:

PDF, 281 KB

english, 2005

2

Medium optimization for the production of avermectin B1a by Streptomyces avermitilis 14-12A using response surface methodology

Hong Gao, Mei Liu, Jintao Liu, Huanqin Dai, Xianlong Zhou, Xiangyang Liu, Ying Zhuo, Wenquan Zhang, Lixin Zhang

Journal:

Bioresource Technology

Année:

2009

Langue:

english

Fichier:

PDF, 209 KB

english, 2009

3

[IEEE 2005 IEEE International Symposium on Circuits and Systems - Kobe, Japan (23-26 May 2005)] 2005 IEEE International Symposium on Circuits and Systems - VLSI Block Placement with Alignment Constraints based on Corner Block List

Song Chen,, Xianlong Hong,, Sheqin Dong,, Yuchun Ma,, Chung-Kuan Cheng,

Année:

2005

Langue:

english

Fichier:

PDF, 302 KB

english, 2005

4

Progress on the layer-by-layer assembly of multilayered polymer composites: strategy, structural control and applications

Zhang, Xianlong, Xu, Yang, Zhang, Xuan, Wu, Hong, Shen, Jiabin, Chen, Rong, Xiong, Ying, Li, Jiang, Guo, Shaoyun

Journal:

Progress in Polymer Science

Année:

2018

Langue:

english

Fichier:

PDF, 1.67 MB

english, 2018

5

Zero skew clock routing in X-architecture based on an improved greedy matching algorithm

Weixiang Shen, Yici Cai, Xianlong Hong, Jiang Hu, Bing Lu

Journal:

Integration, the VLSI Journal

Année:

2008

Langue:

english

Fichier:

PDF, 737 KB

english, 2008

6

Time-domain analysis methodology for large-scale RLC circuits and its applications

Zuying Luo, Yici Cai, Sheldon X. -D. Tan, Xianlong Hong, Xiaoyi Wang, Zhu Pan, Jingjing Fu

Journal:

SCIENCE CHINA Information Sciences

Année:

2006

Langue:

english

Fichier:

PDF, 872 KB

english, 2006

7

Peutz-Jeghers syndrome: a report of 5 cases

Xingwei Wang, Chaoqiang Fan, Dan Que, Hong Guo, Lei Wang, Xianlong Ling, Lei Deng, Xiaoyan Zhao

Journal:

Journal of Medical Colleges of PLA

Année:

2011

Langue:

english

Fichier:

PDF, 265 KB

english, 2011

8

[IEEE 2006 IEEE International Symposium on Circuits and Systems - Island of Kos, Greece (21-24 May 2006)] 2006 IEEE International Symposium on Circuits and Systems - A novel low-power physical design methodology for MTCMOS

Xin Zhao,, Yici Cai,, Qiang Zhou,, Xianlong Hong,

Année:

2006

Langue:

english

Fichier:

PDF, 4.84 MB

english, 2006

9

[IEEE Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) - Wanchai, Hong Kong (1999.01.21-1999.01.21)] Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) - A new global routing algorithm independent of net ordering

Haiyun Bao,, Xianlong Hong,, Yici Cai,

Année:

1999

Langue:

english

Fichier:

PDF, 371 KB

english, 1999

10

[IEEE 2005 IEEE International Symposium on Circuits and Systems - Kobe, Japan (23-26 May 2005)] 2005 IEEE International Symposium on Circuits and Systems - A Global Interconnect Optimization Algorithm under Accurate Delay Model Using Solution Space Smoothing

Yici Cai,, Yibo Wang,, Xianlong Hong,

Année:

2005

Langue:

english

Fichier:

PDF, 400 KB

english, 2005

11

[IEEE ISCAS 2003. International Symposium on Circuits and Systems - Bangkok, Thailand (25-28 May 2003)] Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. - Arbitrary convex and concave rectilinear block packing based on corner block list

Yuchun Ma,, Xianlong Hong,, Sheqin Dong,, Yici Cai,, Song Chen,, Chung-Kuan Cheng,, Jun Gu,

Année:

2003

Langue:

english

Fichier:

PDF, 319 KB

english, 2003

12

[IEEE 2004 IEEE International Symposium on Circuits and Systems - Vancouver, BC, Canada (23-26 May 2004)] 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) - Partial random walk for large linear network analysis

Weikun Guo,, Tan, S.X.-D., Zuying Luo,, Xianlong Hong,

Année:

2004

Langue:

english

Fichier:

PDF, 270 KB

english, 2004

13

[IEEE Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) - Wanchai, Hong Kong (1999.01.21-1999.01.21)] Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) - A timing-driven block placer based on sequence pair model

Gang Huang,, Xianlong Hong,, Changge Qiao,, Yici Cai,

Année:

1999

Langue:

english

Fichier:

PDF, 410 KB

english, 1999

14

[IEEE 2005 IEEE International Symposium on Circuits and Systems - Kobe, Japan (23-26 May 2005)] 2005 IEEE International Symposium on Circuits and Systems - Zero Skew Clock Routing with Tree Topology Construction Using Simulated Annealing Method

Xinjie Wei,, Yici Cai,, Xianlong Hong,

Année:

2005

Langue:

english

Fichier:

PDF, 195 KB

english, 2005

15

[IEEE 2004 IEEE International Symposium on Circuits and Systems - Vancouver, BC, Canada (23-26 May 2004)] 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) - Algorithm for yield driven correction of layout

Yang Wang,, Yici Cai,, Xianlong Hong,, Qiang Zhou,

Année:

2004

Langue:

english

Fichier:

PDF, 349 KB

english, 2004

16

[IEEE International Conference on Computer Aided Design (ICCAD) - San Jose, CA, USA (5-9 Nov. 2000)] IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140) - Corner block list: an effective and efficient topological representation of non-slicing floorplan

Xianlong Hong,, Gang Huang,, Yici Cai,, Jiangchun Gu,, Sheqin Dong,, Chung-Kuan Cheng,, Jun Gu,

Année:

2000

Langue:

english

Fichier:

PDF, 565 KB

english, 2000

17

[IEEE 2004 IEEE International Symposium on Circuits and Systems - Vancouver, BC, Canada (23-26 May 2004)] 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) - Quick and effective buffered legitimate skew clock routing

Meng Zhao,, Xinjie Wei,, Yici Cai,, Xianlong Hong,

Année:

2004

Langue:

english

Fichier:

PDF, 241 KB

english, 2004

18

[IEEE 2004 IEEE International Symposium on Circuits and Systems - Vancouver, BC, Canada (23-26 May 2004)] 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) - Recursively combine floorplan and Q-place in mixed mode placement based on circuit's variety of block configuration

Changqi Yang,, Xianlong Hong,, Honghua Yang, H., Qiang Zhou,, Yici Cai,, Yonqiang Lu,

Année:

2004

Langue:

english

Fichier:

PDF, 235 KB

english, 2004

19

[IEEE 2004 IEEE International Symposium on Circuits and Systems - Vancouver, BC, Canada (23-26 May 2004)] 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) - Performance and RLC crosstalk driven global routing

Ling Zhang,, Tong Jing,, Xianlong Hong,, Jingyu Xu,, Jinjun Xiong,, Lei He,

Année:

2004

Langue:

english

Fichier:

PDF, 236 KB

english, 2004

20

Statistical Analysis of On-Chip Power Delivery Networks Considering Lognormal Leakage Current Variations With Spatial Correlation

Ning Mi,, Fan, J., Tan, S.X-D., Yici Cai,, Xianlong Hong,

Journal:

IEEE Transactions on Circuits and Systems I: Regular Papers

Année:

2008

Langue:

english

Fichier:

PDF, 924 KB

english, 2008

21

Random Walk Guided Decap Embedding for Power/Ground Network Optimization

Cai, Yici, Kang, Le, Shi, Jin, Hong, Xianlong, Tan, Sheldon X.-D.

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Année:

2008

Langue:

english

Fichier:

PDF, 527 KB

english, 2008

22

[IEEE 4th International Conference on ASIC - Shanghai, China (23-25 Oct. 2001)] ASICON 2001. 2001 4th International Conference on ASIC Proceedings (Cat. No.01TH8549) - VLSI/PCB placement with predefined coordinate alignment constraint based on sequence pair

Rui Liu,, Xianlong Hong,, Sheqin Dong,, Yici Cai,, Jun Gu,

Année:

2001

Langue:

english

Fichier:

PDF, 296 KB

english, 2001

23

[IEEE 2004 IEEE International Symposium on Circuits and Systems - Vancouver, BC, Canada (23-26 May 2004)] 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) - Layer assignment algorithm for RLC crosstalk minimization

Bin Liu,, Yici Cai,, Qiang Zhou,, Xianlong Hong,

Année:

2004

Langue:

english

Fichier:

PDF, 222 KB

english, 2004

24

[IEEE 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings - Shanghai, China (2006.10.23-2006.10.26)] 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings - Cubic Packing with Various Candidates for 3D IC Design

Ma, Yuchun, Li, Zhuoyuan, Hong, Xianlong, Cong, Jason, Dong, Sheqin

Année:

2006

Langue:

english

Fichier:

PDF, 84 KB

english, 2006

25

[IEEE 2005 IEEE International Symposium on Circuits and Systems - Kobe, Japan (23-26 May 2005)] 2005 IEEE International Symposium on Circuits and Systems - Performance Constrained Floorplanning Based on Partial Clustering

Yuchun Ma,, Xianlong Hong,, Sheqin Dong,, Song Chen,, Chung-Kuan Cheng,

Année:

2005

Langue:

english

Fichier:

PDF, 206 KB

english, 2005

26

[IEEE 2005 IEEE International Symposium on Circuits and Systems - Kobe, Japan (23-26 May 2005)] 2005 IEEE International Symposium on Circuits and Systems - Fixed-outline Floorplanning with Constraints through Instance Augmentation

Rong Liu,, Sheqin Dong,, Xianlong Hong,, Kajitani, Y.

Année:

2005

Langue:

english

Fichier:

PDF, 364 KB

english, 2005

27

[IEEE 2006 IEEE International Symposium on Circuits and Systems - Island of Kos, Greece (21-24 May 2006)] 2006 IEEE International Symposium on Circuits and Systems - Buffer planning based on block exchanging

Hongjie Bai,, Sheqin Dong,, Xianlong Hong,, Song Chen,

Année:

2006

Langue:

english

Fichier:

PDF, 3.56 MB

english, 2006

28

[IEEE 2009 IEEE International Symposium on Circuits and Systems - ISCAS 2009 - Taipei, Taiwan (2009.05.24-2009.05.27)] 2009 IEEE International Symposium on Circuits and Systems - Buffer planning for 3D ICs

Sheqin Dong,, Hongjie Bai,, Xianlong Hong,, Goto, Satoshi

Année:

2009

Langue:

english

Fichier:

PDF, 683 KB

english, 2009

29

[IEEE 2006 IEEE International Symposium on Circuits and Systems - Island of Kos, Greece (21-24 May 2006)] 2006 IEEE International Symposium on Circuits and Systems - Floorplanning for 2.5-D system integration using multi-layer-BSG structure

Sheqin Dong,, Shuyi Zheng,, Xianlong Hong,

Année:

2006

Langue:

english

Fichier:

PDF, 4.38 MB

english, 2006

30

Hierarchical 3-D Floorplanning Algorithm for Wirelength Optimization

Li, Zhuoyuan, Hong, Xianlong, Zhou, Qiang, Cai, Yici, Bian, Jinian, Yang, Hannah H., Pitchumani, Vijay, Cheng, Chung-Kuan

Journal:

IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications

Année:

2006

Langue:

english

Fichier:

PDF, 869 KB

english, 2006

31

[IEEE 2005 IEEE International Symposium on Circuits and Systems - Kobe, Japan (23-26 May 2005)] 2005 IEEE International Symposium on Circuits and Systems - Interconnect Delay Optimization via High Level Re-synthesis After Floorplanning

Yunfeng Wang,, Jinian Bian,, Xianlong Hong,

Année:

2005

Langue:

english

Fichier:

PDF, 200 KB

english, 2005

32

[IEEE 2006 IEEE International Symposium on Circuits and Systems - Island of Kos, Greece (21-24 May 2006)] 2006 IEEE International Symposium on Circuits and Systems - Performance and Power Aware Buffered Tree Construction

Yibo Wang,, Yici Cai,, Xianlong Hong,

Année:

2006

Langue:

english

Fichier:

PDF, 1.84 MB

english, 2006

33

[IEEE 4th International Conference on ASIC - Shanghai, China (23-25 Oct. 2001)] ASICON 2001. 2001 4th International Conference on ASIC Proceedings (Cat. No.01TH8549) - The selection and creation of the rules in rules-based optical proximity correction

Rui Shi,, Yici Cai,, Xianlong Hong,, Weimin Wu,, Changqi Yang,

Année:

2001

Langue:

english

Fichier:

PDF, 320 KB

english, 2001

34

[IEEE 2006 IEEE International Symposium on Circuits and Systems - Island of Kos, Greece (21-24 May 2006)] 2006 IEEE International Symposium on Circuits and Systems - A novel technique integrating buffer insertion into timing driven placement

Lijuan Luo,, Qiang Zhou,, Yici Cai,, Xianlong Hong,, Yibo Wang,

Année:

2006

Langue:

english

Fichier:

PDF, 421 KB

english, 2006

35

[IEEE 2008 IEEE International Symposium on Circuits and Systems - ISCAS 2008 - Seattle, WA, USA (2008.05.18-2008.05.21)] 2008 IEEE International Symposium on Circuits and Systems - Leakage power optimization for clock network using dual-Vth technology

Weixiang Shen,, Yici Cai,, Xianlong Hong,

Année:

2008

Langue:

english

Fichier:

PDF, 171 KB

english, 2008

36

[IEEE 2007 IEEE International Symposium on Circuits and Systems - New Orleans, LA, USA (2007.05.27-2007.05.30)] 2007 IEEE International Symposium on Circuits and Systems - Clock-Tree Aware Placement Based on Dynamic Clock-Tree Building

Wang, Yanfeng, Zhou, Qiang, Hong, Xianlong, Cai, Yici

Année:

2007

Langue:

english

Fichier:

PDF, 240 KB

english, 2007

37

[ACM Press the 17th great lakes symposium - Stresa-Lago Maggiore, Italy (2007.03.11-2007.03.13)] Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07 - New timing and routability driven placement algorithms for FPGA synthesis

Zhuo, Yue, Li, Hao, Zhou, Qiang, Cai, Yici, Hong, Xianlong

Année:

2007

Langue:

english

Fichier:

PDF, 189 KB

english, 2007

38

[IEEE 2002 IEEE International Symposium on Circuits and Systems - Phoenix-Scottsdale, AZ, USA (26-29 May 2002)] 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353) - Incremental placement algorithm for standard-cell layout

Zhuoyuan Li,, Weimin Wu,, Xianlong Hong,, Jun Gu,

Année:

2002

Langue:

english

Fichier:

PDF, 372 KB

english, 2002

39

[IEEE 2002 IEEE International Symposium on Circuits and Systems - Phoenix-Scottsdale, AZ, USA (26-29 May 2002)] 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353) - Module placement with boundary constraints using O-tree representation

Rui Lu,, Xianlong Hong,, Sheqin Dong,, Yici Cai,, Jun Gu,, Chung-Kuan Cheng,

Année:

2002

Langue:

english

Fichier:

PDF, 320 KB

english, 2002

40

[IEEE ISCAS 2003. International Symposium on Circuits and Systems - Bangkok, Thailand (25-28 May 2003)] Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. - Evaluating a bounded slice-line grid assignment in O(nlogn) time

Song Chen,, Xianlong Hong,, Sheqin Dong,, Yuchun Ma,, Yici Cai,, Chung-Kuan Cheng,, Jun Gu,

Année:

2003

Langue:

english

Fichier:

PDF, 486 KB

english, 2003

41

[IEEE 2007 IEEE International Symposium on Circuits and Systems - New Orleans, LA, USA (2007.05.27-2007.05.30)] 2007 IEEE International Symposium on Circuits and Systems - Unified Quadratic Programming Approach For 3-D Mixed Mode Placement

Yan, Haixia, Li, Zhuoyuan, Hong, Xianlong, Zhou, Qiang

Année:

2007

Langue:

english

Fichier:

PDF, 211 KB

english, 2007

42

[IEEE 2007 IEEE International Symposium on Circuits and Systems - New Orleans, LA, USA (2007.05.27-2007.05.30)] 2007 IEEE International Symposium on Circuits and Systems - Effective Acceleration of Iterative Slack Distribution Process

Wei, Xinjie, Cai, Yici, Hong, Xianlong

Année:

2007

Langue:

english

Fichier:

PDF, 163 KB

english, 2007

43

[IEEE 2007 IEEE International Symposium on Circuits and Systems - New Orleans, LA, USA (2007.05.27-2007.05.30)] 2007 IEEE International Symposium on Circuits and Systems - A Fast 3D-BSG Algorithm for 3D Packing Problem

Zhang, Lingyi, Dong, Sheqin, Hong, Xianlong, Ma, Yuchun

Année:

2007

Langue:

english

Fichier:

PDF, 454 KB

english, 2007

44

[IEEE ISCAS 2003. International Symposium on Circuits and Systems - Bangkok, Thailand (25-28 May 2003)] Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. - Algorithms for analog VLSI 2D stack generation and block merging

Rui Liu,, Sheqin Dong,, Xianlong Hong,, Di Long,, Jun Gu,

Année:

2003

Langue:

english

Fichier:

PDF, 430 KB

english, 2003

45

[IEEE 2002 IEEE International Symposium on Circuits and Systems - Phoenix-Scottsdale, AZ, USA (26-29 May 2002)] 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353) - A standard-cell placement algorithm of optimizing multiple objects

Wenting Hou,, Xianlong Hong,, Weimin Wu,, Yici Cai,

Année:

2002

Langue:

english

Fichier:

PDF, 339 KB

english, 2002

46

Reinforced thermal conductivity and mechanical properties of in situ microfibrillar composites through multistage stretching extrusion

Zhang, Xianlong, Wu, Hong, Guo, Shaoyun, Wang, Yuzhong

Journal:

Polymer Composites

Année:

2015

Langue:

english

Fichier:

PDF, 615 KB

english, 2015

47

Ordered multilayer film of (graphene oxide/polymer and boron nitride/polymer) nanocomposites: An ideal EMI shielding material with excellent electrical insulation and high thermal conductivity

Zhang, Xianlong, Zhang, Xiaomeng, Yang, Mingtao, Yang, Shuo, Wu, Hong, Guo, Shaoyun, Wang, Yuzhong

Journal:

Composites Science and Technology

Année:

2016

Langue:

english

Fichier:

PDF, 2.18 MB

english, 2016

48

A 2-bp insertion (c.67_68insCC) in MC1R causes recessive white coat color in Bama miniature pigs

Jia, Qitao, Cao, Chunwei, Hai, Tang, Zhang, Ying, Zheng, Qiantao, Wang, Xiao, Zhang, Rui, Wang, Xianlong, Luo, Ailing, Wei, Hong, Meng, Anming, Zhou, Qi, Wang, Hongmei, Zhao, Jianguo

Journal:

Journal of Genetics and Genomics

Année:

2017

Langue:

english

Fichier:

PDF, 7.41 MB

english, 2017

49

Enhancing the neutron shielding ability of polyethylene composites with an alternating multi-layered structure

Zhang, Xianlong, Yang, Mingtao, Zhang, Xiaomeng, Wu, Hong, Guo, Shaoyun, Wang, Yuzhong

Journal:

Composites Science and Technology

Année:

2017

Langue:

english

Fichier:

PDF, 1.38 MB

english, 2017

50

Endowing the high efficiency thermally conductive and electrically insulating composites with excellent antistatic property through selectively multilayered distribution of diverse functional fillers

Zhang, Xiaomeng, Zhang, Jiajia, Li, Chunhai, Wang, Jianfeng, Xia, Lichao, Xu, Fang, Zhang, Xianlong, Wu, Hong, Guo, Shaoyun

Journal:

Chemical Engineering Journal

Année:

2017

Langue:

english

Fichier:

PDF, 4.99 MB

english, 2017